Modern PCBs are more than a substrate — they're precision-engineered interconnect systems. This guide covers the via technologies, advanced features, and design techniques J-Cube's manufacturing partners can deliver.
Via selection is one of the most consequential design decisions in a PCB. The right via type affects routing density, signal integrity, thermal performance, and manufacturing cost.
Connect an outer layer to one or more inner layers without passing through the entire board. Produced by depth-controlled mechanical drilling or laser drilling. Preserve routing space on far layers and improve thermal management paths. More economical than buried vias (can be drilled after lamination).
Connect two or more inner layers with no connection to either outer surface. Must be drilled and plated before outer layer lamination — requiring sequential build-up. Maximizes routing and component space on outer surfaces. Higher cost than blind vias due to extra lamination cycles.
Less than 150 µm diameter (standard 0.1mm, 0.15mm), laser drilled. Maximum substrate thickness of 0.6mm for laser penetration. Enable HDI designs — more vias per unit area than mechanically drilled alternatives. Reduce parasitic inductance and capacitance at each via, improving signal integrity in high-speed designs.
Solid copper fill (vs. hollow barrel) provides ~400 W/m·K thermal conductivity — conducts heat from surface components directly to inner layers or heatsinks. Structurally superior: resists thermal cycling, vibration, and mechanical stress. Enables via-in-pad designs (component pad placed directly over the via).
Multiple laser-drilled micro vias stacked directly on top of each other across consecutive layers. Each layer requires separate drilling and plating — the most complex HDI structure. Enables the highest interconnect density per unit area achievable in PCB manufacturing. IPC/JPCA-2315 governs design rules.
A second controlled-depth drilling operation removes via stubs — the unused portion of a through-hole that doesn't serve a connection. Via stubs create parasitic capacitance and resonance that degrades high-speed signals: at ≥10 Gbps, stubs cause reflections measurable in bit error rate. Back drilling leaves only a small residual stub. Can improve bit error rate by several orders of magnitude. Premium process, validated during CAM engineering.
Vias placed directly beneath component pads rather than fanning out to adjacent routing. Reduces signal path length and PCB footprint. Requires copper-filled or epoxy-filled vias to prevent solder wicking during assembly. Enables the smallest achievable component pitches and direct underfill of BGA components.
These features extend what's possible in PCB design — from higher component density and embedded passives to specialized edge and interface solutions.
Fine lines and spaces (3mil/3mil or tighter), micro vias, and higher connection pad density. Governed by IPC/JPCA-2315. Enables more components per unit area, fewer layers vs. conventional multilayer, and superior electrical performance through shortened signal paths. Requires sequential build-up lamination for complex via structures.
Resistors embedded inside PCB layers using thin film (Ni-Cr-Al-Si, ~0.1 µm via vapor deposition, laser-trimmed to value) or thick film (conductive polyimide resin) technology. Reduces solder joints (improves reliability), reduces crosstalk and EMI, eliminates inductive reactance of SMD resistor leads, and shortens signal paths. Also provides intellectual property protection by preventing circuit duplication.
Resistors, capacitors, and inductors integrated directly into PCB layers during fabrication. Reduces board size, shortens signal paths to passive components, and reduces parasitic effects compared to surface-mounted equivalents. Requires specialized design and manufacturing — higher tooling cost offset by assembly savings at volume.
Plated half-holes machined along PCB edges, used to solder small sub-modules onto larger carrier boards. Four types (I–IV) depending on hole geometry and post-processing method. PCB manufacturers plate castellations before routing — the edge must align with the outer panel edge. Boards with castellations on all four edges cannot be panelized using standard methods; boards with two opposite edges can panelize on the perpendicular sides.
Copper plating applied to board edges, creating an electrical connection or ground path along the PCB perimeter. Used for EMI/RFI shielding by connecting the edge copper to a ground plane, or for edge-connector contacts on card-edge connectors. Requires the board edge to coincide with the outer panel edge during manufacturing.
Conductive carbon paste screen-printed onto the PCB surface, dried and cured. Creates fixed resistors, jumpers, or conductive traces at very low cost — particularly useful for keyboard contact pads and membrane switch interfaces. Carbon ink has higher resistivity than copper but eliminates the need for discrete resistor components in appropriate applications.
J-Cube works with a network of qualified manufacturing partners capable of a wide range of advanced PCB technologies. If your design requires a feature not described on this page — specialized impedance control, RF laminate combinations, unique via configurations, or custom stack-ups — contact our engineering team. We'll assess feasibility and confirm what's achievable for your application.